Home | Contact Us | FAQ | Search & Site Map | Link to Us
Sign In | Join | Other 45 Sites in Network
Home
Discussion Groups
General
GeneralPortable MacsHardwareNetworking
Applications
Mac ApplicationsEudoraFirefox / MozillaInternet ExplorerOutlook ExpressMS OfficeEntourageExcelPowerPointWordVirtual PCMedia PlayerOther MS Products
Programming
Mac ProgrammingCodeWarriorPerl
Country Specific
Australian Mac GroupUK Mac Group

Mac Forum / General / Portable Macs / May 2006



Tip: Looking for answers? Try searching our database.

[Ti PowerBook G4/667 GigabitEN] Memory speed and CAS latency ?

Thread view: 
Enable EMail Alerts  Start New Thread
Thread rating: 
Claude-Albert Berseth - 21 May 2006 18:33 GMT
Hi,
I recently upgraded my Ti PowerBook G4/667 GigabitEN from the initial
512MB RAM to 1GB RAM. I now have 2x 512MB RAM which work very nicely. No
more pageouts when I have too many applications open.

Now, the new RAM type is SDRAM PC133-333 which means a CAS latency of
CL3. Not really fast... I see this in the System Profiler as well as on
the sticker on the RAM banks.

I think the original memory was PC133-222 but I can't check this any
more because I sold these banks. Now way to find this info on Apple's
web site either.

Could anyone out there with the same PowerBook (with 2x 256MB RAM) check
this for me ?

Also, assuming the original memory was indeed CL2, how much faster would
that be ?

Thanks in advance !
Claude-Albert
David Empson - 21 May 2006 22:08 GMT
> Hi,
> I recently upgraded my Ti PowerBook G4/667 GigabitEN from the initial
[quoted text clipped - 11 lines]
> Could anyone out there with the same PowerBook (with 2x 256MB RAM) check
> this for me ?

I have the next model (Titanium PowerBook G4 667 DVI). It was supplied
with 256 MB of RAM, which is SDRAM PC133-333. I added a second 512 MB
SO-DIMM, which has the same specifications.

> Also, assuming the original memory was indeed CL2, how much faster would
> that be ?

There is a Wikipedia article explaining the general principles:
http://en.wikipedia.org/wiki/SDRAM_latency

Given 222 RAM instead of 333, it should mean one less bus clock cycle
delay in accessing a column, and assuming the article is right, the
second number is the row-to-column address delay, but it isn't clear
what the third number might be (the article mentions a fourth number as
well). Can anyone else fill in the blanks?

When accessing data in a single "column" of memory, maximum speed can be
achieved. It is only when changing to a new "column" that these
parameters become significant. I believe it should work out that CL2 RAM
is one bus cycle faster than CL3 RAM when changing to a new column.

For PC133 RAM, the bus clock is 133 MHz, so a sequence of memory
accesses which all referred to different columns would be performed at
133/3 = 44 million accesses per second with CL3 RAM, or 133/2 = 66
million accesses per second with CL2 RAM. (If the latency doesn't
include the actual access cycle, then add one more in each case,
resulting in 133/4 = 33 million for CL3, 44 million for CL2.)

If sequential memory locations are being accessed (within a single
column) then both types can achieve 133 million accesses per second.

Signature

David Empson
dempson@actrix.gen.nz

C-A Berseth - 22 May 2006 06:47 GMT
Hi David,

Thanks for your explanations and for the info about your RAM modules !
I looked at various websites and found the description of these latency
codes a bit confusing... not always
consistent and finally hard to figure out how much speed improvement can be
achieved.
Furthermore, most vendors don't tell these details (or even the CAS latency)
on their web sites. You discover
them either on the sticker or using a diagnostic tool after installation...
BTW, I opened my Powerbook and verified the stickers on my RAM modules. One
of them is CL3 and the other is labeled
as CL2.5 ... I need to complain about this at the store which sold me these
RAMs and mounted them !
Regards,

Claude-Albert

>> Hi,
>> I recently upgraded my Ti PowerBook G4/667 GigabitEN from the initial
[quoted text clipped - 42 lines]
> If sequential memory locations are being accessed (within a single
> column) then both types can achieve 133 million accesses per second.
 
Sign In
Join
My Latest Posts
My Monitored Threads
My Blog
My Photo Gallery
My Profile
My Homepage

Start New Thread
Enable EMail Alerts
Rate this Thread



©2008 Advenet LLC   Privacy Policy - Terms of Use
This website includes both content owned or controlled by Advenet as well as content owned or controlled by third parties.