Mac Forum / General / Hardware / September 2006

Some of the hype was hype.

But what we'd seen was CPUs that just kept growing.  Add more instructions
for relatively obscure functions, and add them on top of what came before.
The 8086 was on some level an extension of the 8080, and the 80286, 80386 and
so on just kept adding instructions.

The notion of RISC was to do a basic set of instructions fast.  Streamline
the design to do those basic instructions fast, and doing more complicated
things by combining them will still get things done fast.  Make the
instruction set more universal, rather than one instruction that increments
that register and another that increments that other register.

Long before Apple switched to RISC, "computer scientists" had decided
they were the future.

The X86 were never RISC.  They chose the other path.

I think they are said to be better at this point, and if this is true,
I imagine one reason is simply the money is there to develop them.  There
is a big investment in those CPUs, so it's worth the effort to make
them faster yet keep them compatible with the past.  They may just
remain better by sheer force, make them run fast enough and it doesn't
matter how inefficient they are.

Let's not forget that when Apple moved to the RISC, the first ran
at 60MHz.  That was close to the maximum clock speed at the time (486s
at the time were about the same clock speed), so there were limitations
of the speed and improving efficiency would make an improvement.

What are current clock speeds now?  Well past the 1GHz of this computer
I'm typing on, which means they are many times the speed of the 6100/60
that I'm using to elevate my monitor.  That leap forward means that CPUs
can still be inefficient, but nobody notices.

If there had been  a large scale shift to RISC, likely they'd not have
moved out of the mainstream.  But there are advantages for Apple to shift
to a common CPU, where advances are likely happening at a much faster
rate.  ANd the current speed masks the inefficiency of the CISC CPUs,
so any advantages of RISC are buried.

 Michael

ARM. Open your mobile phone or your PDA. There's one in there,
probably. Also in the machine I'm using for this response. Intel have
just launched new versions.

several things happened, but the largest factor is being able to
through more hardware at the problem.  That is to say, when RISC
was first designed there were a lot less transistors on a chip so
you had to make the transistors you had do more, you had smaller
caches, you had slower multipliers/dividers/adders/etc...

A RISC chip allowed you to devote more transistors to cache,
faster multipliers/dividers/adders/etc...

But as more transistors on a chip became available, the designers
could implement larger caches, and even faster caches which take
fewer clock cycles to access.  The multipliers/dividers/adders/etc
could be made faster.  And you could have separate functional
units for instruction math vs address math vs next instruction
calculation (increment program counter or relative branch
calculations.

More transistors allowed for "Super Scaler" implementations where
more than one instruction could be executed concurrently, out of
order execution etc...

More transistors was an advantage for all the chip vendors
including intel, and for intel it allowed them to make their
instructions as fast as less complex RISC instructions.  
Eventually the CPU was less of the bottle neck and now it moved to
how fast you could move information in/out of the CPU and in that
area there was no specific advantage for RISC or CISC vendors.

Plus intel had the advantage that they had the huge personal
computer market to fund their research into both design and
manufacturing.  The RISC vendors were not selling enough systems
to fund the construction of new multi-billion dollar semiconductor
FABs every few years.  This put them at a disadvantage either they
could not do line shrinks as quickly, or they had to contract with
a FAB for hire company and deal with the slower lead times in
getting the wrinkles worked out of the manufacturing process of
turning a chip design into silicon.

Plus intel had AMD applying pressure to their core business
(personal computer systems), which kept them focused, and kept
them from sitting idle on a bad chip design when the competition
made something faster.

And back to that huge market funding their development.  intel
could afford to have more than one design group.  The P4 was one
of those designs that went the wrong way.  The pipeline was too
deep and had difficulty maintaining its full throughput potential.  
In addition the Pentium line would not play nice in an SMP
environment, so while slower the Xeon line stayed in the game
because it could be used in multi-CPU server systems.

But being able to fund those multiple design groups, gave use the
Core 2 Duals (and soon the Core 2 Quads; November announcement),
which are faster, lower power, and fully SMP capable.

And in case you are wondering, I have only owned one 486 PC system
when I was experimenting with Windows-NT during its beta phase,
and I did have to a Digital Equipment Corporation VAXmate (a 386
system) for awhile, mostly using it as a terminal emulator.

The rest of the time I used VAXs, Alphas, Macs (68020, 68030,
68040, PPC/601, PPC/603, PPC/603e, G3, G4, G5), and an itanium for
2 years at work.  I've used other CPUs as well including IBM 360s,
UNIVAX 9700s, UNIVAX 418III (you haven't lived until you worked on
a 1's complement CPU :-) ).

My point is that I am not an intel do or die user.  But I've been
in the computer industry for a few years, and I've worked as a
software developer for several computer manufactures (UNIVAC,
Leeds & Northrup [designed and developed their own ECL based CPU],
Digital Equipment Corporation, Compaq, HP).  I've written hardware
diagnostics which ran on raw hardware without an operating system,
so the diagnostic had to control everything.  I'm currently a file
system developer working inside the kernel.  I've seen hardware up
close and personal.

                                       Bob Harris

Henry a écrit :

The modern x86 chips are RISC at the core, and have a mechanism to split
the complex instructions to simple ones.

http://en.wikipedia.org/wiki/Risc#Later_RISC